s3c2440的2440init_s的分析
;=========================================
; NAME: 2440INIT.S
; DESC: C start up codes
; Configure memory, ISR ,stacks
; Initialize C-variables
; HISTORY:
; 2002.02.25:kwtark: ver 0.0
; 2002.03.20:purnnamu: Add some functions for testing STOP,Sleep mode
; 2003.03.14:DonGo: Modified for 2440.
;=========================================
;//GET類似于C語言的include,option.inc文件內(nèi)定義了一些全局變量,memcfg.inc文件內(nèi)定義了關(guān)于內(nèi)存bank的符號(hào)和數(shù)字常量,2440addr.inc文件內(nèi)定義了用于匯編的s3c2440寄存器變量和地址
GET option.inc
GET memcfg.inc
GET 2440addr.inc
BIT_SELFREFRESH EQU (1<<22) ;//#define BIT_SELFREFRESH (1<<22)
;//下面是對(duì)arm處理器模式寄存器對(duì)應(yīng)的常數(shù)進(jìn)行賦值,arm處理器有一個(gè)CPSR寄存器,它的后五位決定了處理器處于哪個(gè)模式下。
;//可以看出常數(shù)的定義都不會(huì)超過后5位的。
USERMODE EQU 0x10
FIQMODE EQU 0x11
IRQMODE EQU 0x12
SVCMODE EQU 0x13
ABORTMODE EQU 0x17
UNDEFMODE EQU 0x1b
MODEMASK EQU 0x1f
NOINT EQU 0xc0
;//定義了7種處理器模式下的棧的起始地址,其中用戶模式和系統(tǒng)模式共有一個(gè)??臻g
UserStack EQU (_STACK_BASEADDRESS-0x3800) ;0x33ff4800 ~
SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;0x33ff5800 ~
UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;0x33ff5c00 ~
AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;0x33ff6000 ~
IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff7000 ~
FIQStack EQU (_STACK_BASEADDRESS-0x0) ;0x33ff8000 ~
;//這一段是統(tǒng)一arm的工作狀態(tài)和對(duì)應(yīng)的軟件編譯方式(16位編譯環(huán)境使用tasm.exe編譯)。
;//arm處理器的工作狀態(tài)分為兩種:32位,arm執(zhí)行字對(duì)齊的arm指令集;16位,arm執(zhí)行半字對(duì)齊的Thumb指令集。
;//不同的工作狀態(tài),編譯方式也不一樣。所以下面的程序就是判斷arm的工作方式來確定它的編譯方式。
;//difine grobal parameters 定義THUMBCODE這個(gè)變量 GBLL聲明一個(gè)全局邏輯變量并初始化為{FALSE}
;//初始化為{FALSE} GBLA(算術(shù)變量),GBLL(邏輯變量),GBLS(字符串變量)
;Check if tasm.exe(armasm -16 ...@ADS 1.0) is used.
GBLL THUMBCODE
[ {CONFIG} = 16 ;//CONFIG為匯編器的內(nèi)置變量 對(duì)于CONFIG是在ADS編譯中定義的內(nèi)部變量
THUMBCODE SETL {TRUE}];//如果ARM是在16位的工作狀態(tài)的話,就使全局變量THUMBCODE設(shè)置為ture
CODE32
|
THUMBCODE SETL {FALSE}
]
MACRO
MOV_PC_LR
[ THUMBCODE
bx lr
|
mov pc,lr
]
MEND
MACRO
MOVEQ_PC_LR
[ THUMBCODE
bxeq lr
|
moveq pc,lr
]
MEND
MACRO
$HandlerLabel HANDLER $HandleLabel
$HandlerLabel //
sub sp,sp,#4 ;decrement sp(to store jump address)//預(yù)留一個(gè)值來保存 服務(wù)子程序的地址
stmfd sp!,{r0} ;//保存R0,因?yàn)橄旅媸褂昧?PUSH the work register to stack(lr does not push because it return to original address)
ldr r0,=$HandleLabel;//將$HandleLabel這個(gè)地址裝載到R0 ;load the address of HandleXXX to r0
ldr r0,[r0] ;//取出$HandleLabel地址存儲(chǔ)的數(shù)據(jù),該數(shù)據(jù)就是服務(wù)子程序的地址 load the contents(service routine start address) of HandleXXX
str r0,[sp,#4] ;//str不是入棧,只是把r0值放到 sp+4 這個(gè)地址上面 ;store the contents(ISR) of HandleXXX to stack
ldmfd sp!,{r0,pc} //都出棧,pc指向服務(wù)子程序的地址 ;POP the work register and pc(jump to ISR)
MEND
IMPORT |Image$$RO$$Base| ; Base of ROM code
IMPORT |Image$$RO$$Limit| ; End of ROM code (=start of ROM data)
IMPORT |Image$$RW$$Base| ; Base of RAM to initialise
IMPORT |Image$$ZI$$Base| ; Base and limit of area
IMPORT |Image$$ZI$$Limit| ; to zero initialise
IMPORT MMU_SetAsyncBusMode
IMPORT MMU_SetFastBusMode ;
IMPORT Main ; The main entry of mon program//引入主函數(shù)地址
IMPORT CopyProgramFromNand ;//引入把代碼從nandflash復(fù)制到內(nèi)存
AREA Init,CODE,READONLY ;//這表明下面的是一個(gè)名為Init的代碼段
ENTRY ;//定義程序的入口(調(diào)試用)
EXPORT __ENTRY ;//導(dǎo)出符號(hào)_ENTRY,但在那用到就還沒查明
__ENTRY
ResetEntry
;1)The code, which converts to Big-endian, should be in little endian code.
;2)The following little endian code will be compiled in Big-Endian mode.
; The code byte order should be changed as the memory bus width.
;3)The pseudo instruction,DCD can not be used here because the linker generates error.
ASSERT :DEF:ENDIAN_CHANGE ;//判斷模式改變是否定義過(ASSERT是偽指令,:DEF:lable判斷l(xiāng)able是否定義過了)
[ ENDIAN_CHANGE;//下面是大小端的一個(gè)判斷,在Option.inc里已經(jīng)設(shè)為FALSE
ASSERT :DEF:ENTRY_BUS_WIDTH
[ ENTRY_BUS_WIDTH=32
b ChangeBigEndian ;DCD 0xea000007
]
[ ENTRY_BUS_WIDTH=16
andeq r14,r7,r0,lsl #20 ;DCD 0x0007ea00
]
[ ENTRY_BUS_WIDTH=8
streq r0,[r0,-r10,ror #1] ;DCD 0x070000ea
]
|
b ResetHandler;//中斷向量表 --設(shè)成FALSE的話就來到這了,轉(zhuǎn)跳到復(fù)位程序入口
]
b HandlerUndef ;handler for Undefined mode //轉(zhuǎn)跳到Undefined mode程序入口
b HandlerSWI ;handler for SWI interrupt //轉(zhuǎn)跳到SWI 中斷程序入口
b HandlerPabort ;handler for PAbort //轉(zhuǎn)跳到PAbort(指令異常)程序入口
b HandlerDabort ;handler for DAbort //轉(zhuǎn)跳到DAbort(數(shù)據(jù)異常)程序入口
b . ;reserved //保留
b HandlerIRQ ;handler for IRQ interrupt //轉(zhuǎn)跳到IRQ 中斷程序入口
b HandlerFIQ ;handler for FIQ interrupt //轉(zhuǎn)跳到FIQ 中斷程序入口
;@0x20
b EnterPWDN ; Must be @0x20.
;//==================================================================================
;//下面是改變大小端的程序,這里采用直接定義機(jī)器碼的方式,至說為什么這么做就得問三星了
;//反正我們程序里這段代碼也不會(huì)去執(zhí)行,不用去管它
;//==================================================================================
ChangeBigEndian
;@0x24
[ ENTRY_BUS_WIDTH=32
DCD 0xee110f10 ;0xee110f10 => mrc p15,0,r0,c1,c0,0
DCD 0xe3800080 ;0xe3800080 => orr r0,r0,#0x80; //Big-endian
DCD 0xee010f10 ;0xee010f10 => mcr p15,0,r0,c1,c0,0
]
[ ENTRY_BUS_WIDTH=16
DCD 0x0f10ee11
DCD 0x0080e380
DCD 0x0f10ee01
]
[ ENTRY_BUS_WIDTH=8
DCD 0x100f11ee
DCD 0x800080e3
DCD 0x100f01ee
]
DCD 0xffffffff ;swinv 0xffffff is similar with NOP and run well in both endian mode.
DCD 0xffffffff
DCD 0xffffffff
DCD 0xffffffff
DCD 0xffffffff
b ResetHandler
HandlerFIQ HANDLER HandleFIQ
HandlerIRQ HANDLER HandleIRQ
HandlerUndef HANDLER HandleUndef
HandlerSWI HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabort
;===================================================================================
;//這一段程序是用來進(jìn)行第二次查表的過程了.
;//如果說第一次查表是由硬件來完成的,那這一次查表就是由軟件來實(shí)現(xiàn)的了.
;//為什么要查兩次表??
;//沒有辦法,ARM把所有的中斷都?xì)w納成一個(gè)IRQ中斷異常和一個(gè)FIRQ中斷異常
;//第一次查表主要是查出是什么異常,可我們總要知道是這個(gè)中斷異常中的什么中斷呀!
;//沒辦法了,再查一次表唄!
;===================================================================================
IsrIRQ
sub sp,sp,#4 ;reserved for PC //預(yù)留一個(gè)值來保存 服務(wù)子程序的地址
stmfd sp!,{r8-r9} ; //將r8 r9入棧
ldr r9,=INTOFFSET ;//偏移量
ldr r9,[r9]
ldr r8,=HandleEINT0
add r8,r8,r9,lsl #2 ;//將INTOFFSET和HandleEINT0結(jié)合起來
ldr r8,[r8] ;//裝入中斷服務(wù)程序的入口
str r8,[sp,#8] ;//str不是入棧,只是把r0值放到 sp+8 這個(gè)地址上面
ldmfd sp!,{r8-r9,pc} ;//一個(gè)個(gè)出棧
LTORG ;//聲明文字池,因?yàn)槲覀冇昧薼dr偽指令
;=======
; ENTRYY//(好了,我們的CPU要在這復(fù)位了.)
;=======
ResetHandler
ldr r0,=WTCON ;watch dog disable //關(guān)開門狗
ldr r1,=0x0
str r1,[r0]
ldr r0,=INTMSK
ldr r1,=0xffffffff ;all interrupt disable //關(guān)中斷
str r1,[r0]
ldr r0,=INTSUBMSK
ldr r1,=0x7fff ;all sub interrupt disable //關(guān)子中斷
str r1,[r0]
[ {TRUE} ;//點(diǎn)LED燈
;rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4);
; Led_Display
ldr r0,=GPBCON
ldr r1,=0x00555555
str r1,[r0]
ldr r0,=GPBDAT
ldr r1,=0x07fe
str r1,[r0]
]
;//為了減少PLL的lock time, 調(diào)整LOCKTIME寄存器.
;To reduce PLL lock time, adjust the LOCKTIME register.
ldr r0,=LOCKTIME
ldr r1,=0xffffff
str r1,[r0]
[ PLL_ON_START;//6.下面就來設(shè)置PLL了,你的板快不快就看這了!!
; Added for confirm clock divide. for 2440.
; Setting value //Fclk:Hclk:Pclk
ldr r0,=CLKDIVN
ldr r1,=CLKDIV_VAL ; 0=1:1:1, 1=1:1:2, 2=1:2:2, 3=1:2:4, 4=1:4:4, 5=1:4:8, 6=1:3:3, 7=1:3:6.
str r1,[r0]
; MMU_SetAsyncBusMode and MMU_SetFastBusMode over 4K, so do not call here
; call it after copy
; [ CLKDIV_VAL>1 ; means Fclk:Hclk is not 1:1.
; bl MMU_SetAsyncBusMode ;//MMU_SetAsyncBusMode在4k以后,所以現(xiàn)在還不能調(diào)用
; |
; bl MMU_SetFastBusMode ; default value.
; ]
;program has not been copied, so use these directly
[ CLKDIV_VAL>1 ; means Fclk:Hclk is not 1:1.//意思是 Fclk:Hclk 不是 1:1.
mrc p15,0,r0,c1,c0,0
orr r0,r0,#0xc0000000;R1_nF:OR:R1_iA
mcr p15,0,r0,c1,c0,0
|
mrc p15,0,r0,c1,c0,0
bic r0,r0,#0xc0000000;R1_iA:OR:R1_nF
mcr p15,0,r0,c1,c0,0
]
;Configure UPLL //配置 UPLL
ldr r0,=UPLLCON
ldr r1,=((U_MDIV<<12)+(U_PDIV<<4)+U_SDIV)
str r1,[r0]
nop ; Caution: After UPLL setting, at least 7-clocks delay must be inserted for setting hardware be completed.
nop
nop
nop
nop
nop
nop
;Configure MPLL//配置 MPLL 一定要使最后的頻率為16.9344MHz,不然你甭想用USB接口了,哈哈.
ldr r0,=MPLLCON
ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV) ;Fin=16.9344MHz
str r1,[r0]
]
;//檢查是否從SLEEP模式中恢復(fù)
;Check if the boot is caused by the wake-up from SLEEP mode.
ldr r1,=GSTATUS2
ldr r0,[r1]
tst r0,#0x2
;In case of the wake-up from SLEEP mode, go to SLEEP_WAKEUP handler.
;//如果是從SLEEP模式中恢復(fù), 轉(zhuǎn)跳到SLEEP_WAKEUP.
bne WAKEUP_SLEEP
EXPORT StartPointAfterSleepWakeUp ;//導(dǎo)出符號(hào)StartPointAfterSleepWakeUp
StartPointAfterSleepWakeUp
;//設(shè)置內(nèi)存控制器等寄存器的值,因?yàn)檫@些寄存器是連續(xù)排列的,所以采用如下辦法對(duì)這些
;//寄存器進(jìn)行連續(xù)設(shè)置.其中用到了SMRDATA的數(shù)據(jù),這在代碼后面有定義
;Set memory control registers //給adram的寄存器賦值
;ldr r0,=SMRDATA
adrl r0, SMRDATA ;be careful! //得到SMRDATA的首地址
ldr r1,=BWSCON ;BWSCON Address //得到BWSCON的地址
add r2, r0, #52 ;End address of SMRDATA
;//用于把(存儲(chǔ)器總線寬度&等待控制寄存器BWSCON,Bank控制寄存器BANKCON0-5) 賦值
0
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne %B0
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;; When EINT0 is pressed, Clear SDRAM
;//如果 EINT0 產(chǎn)生(這中斷就是我們按鍵產(chǎn)生的), 就清除SDRAM ,不過好像沒人會(huì)在這個(gè)時(shí)候按
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; check if EIN0 button is pressed
ldr r0,=GPFCON
ldr r1,=0x0
str r1,[r0]
ldr r0,=GPFUP
ldr r1,=0xff
str r1,[r0]
ldr r1,=GPFDAT
ldr r0,[r1]
bic r0,r0,#(0x1e<<1) ; bit clear
tst r0,#0x1 ;//r0&&0x01 當(dāng)按鍵0沒有被按下的時(shí)候,也就是不相等,就跳轉(zhuǎn)啦。不過好像沒人會(huì)在這個(gè)時(shí)候按
bne %F1
; Clear SDRAM Start//這就是清零內(nèi)存的代碼
ldr r0,=GPFCON
ldr r1,=0x55aa
str r1,[r0]
; ldr r0,=GPFUP
; ldr r1,=0xff
; str r1,[r0]
ldr r0,=GPFDAT
ldr r1,=0x0
str r1,[r0] ;LED=****
mov r1,#0
mov r2,#0
mov r3,#0
mov r4,#0
mov r5,#0
mov r6,#0
mov r7,#0
mov r8,#0
ldr r9,=0x4000000 ;64MB ;//清零內(nèi)存
ldr r0,=0x30000000
0
stmia r0!,{r1-r8} ;//stm出棧,把r1-r8的值賦到r0上,然后r0+4
subs r9,r9,#32
bne %B0
;Clear SDRAM End
1
;Initialize stacks//初始化各種處理器模式下的堆棧
bl InitStacks
;===========================================================
ldr r0, =BWSCON
ldr r0, [r0]
ands r0, r0, #6 ;OM[1:0] != 0, NOR FLash boot //從norflash啟動(dòng)就跳轉(zhuǎn)到copy_proc_beg
bne copy_proc_beg ;do not read nand flash
adr r0, ResetEntry ;OM[1:0] == 0, NAND FLash boot//從nandflash啟動(dòng)
cmp r0, #0
;if use Multi-ice //在進(jìn)行比較,是否入口地址是在0處
;//如果不是,則表示主板設(shè)置了從NAND啟動(dòng),但這個(gè)程序由于其它原因, 并沒有從NAND從啟動(dòng),這種情況最有可能的原因就是用仿真器.
bne copy_proc_beg ;do not read nand flash for boot//仿真器也不需要在NAND FLASH啟動(dòng)
;nop
;===========================================================
;//bl 帶返回的跳轉(zhuǎn)指令
;//l 決定是否保存返回地址。當(dāng)有l(wèi)時(shí),當(dāng)前的PC寄存器的值將保存到lr寄存器中
;// 當(dāng)無l時(shí),指令僅執(zhí)行跳轉(zhuǎn),當(dāng)前的PC寄存器的值將不會(huì)保存到lr寄存器中
nand_boot_beg
[ {TRUE}
bl CopyProgramFromNand //把nandflash中的程序全部copy到sdram中,從???
|
mov r5, #NFCONF ;//首先設(shè)定NAND的一些控制寄存器
;set timing value
ldr r0, =(7<<12)|(7<<8)|(7<<4)
str r0, [r5]
;enable control
ldr r0, =(0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0)
str r0, [r5, #4]
bl ReadNandID ;//按著讀取NAND的ID號(hào),結(jié)果保存在r5里
mov r6, #0 ;//r6設(shè)初值0.
ldr r0, =0xec73 ;//期望的NAND ID號(hào)
cmp r5, r0 ;//這里進(jìn)行比較
beq %F1 ;//相等的話就跳到下一個(gè)1標(biāo)號(hào)處
ldr r0, =0xec75 ;//這是另一個(gè)期望值
cmp r5, r0
beq %F1 ;//相等的話就跳到下一個(gè)1標(biāo)號(hào)處
mov r6, #1 ;//不相等了,設(shè)置r6=1.
1
bl ReadNandStatus ;//讀取NAND狀態(tài),結(jié)果放在r1里
mov r8, #0 ;//r8設(shè)初值0,意義為頁號(hào)
ldr r9, =ResetEntry ;// r9設(shè)初值為初始化程序入口地址
;// 注意,在這里使用的是ldr偽指令,而不是上面用的adr偽指令,它加載的是ResetEntry
;// 的絕對(duì)地址,也就是我們期望的RAM中的地址,在這里,它和|Image$$RO$$Base|一樣
;// 也就是說,如我們編譯程序時(shí)RO base指定的地址在RAM里,而把生成的文件拷到
;// NAND里運(yùn)行,由ldr加載的r9的值還是定位在內(nèi)存. ???
2
ands r0, r8, #0x1f;//r8為0x1f(32)的整數(shù)倍-1,eq有效,ne無效
bne %F3 ;//這句的意思是對(duì)每個(gè)塊(32頁)進(jìn)行檢錯(cuò)
mov r0, r8 ;//r8->r0
bl CheckBadBlk ;//檢查NAND的壞區(qū)
cmp r0, #0 ;//比較r0和0
addne r8, r8, #32 ;//存在壞塊的話就跳過這個(gè)壞塊
bne %F4 ;//沒有的話就跳到標(biāo)號(hào)4處
3
mov r0, r8 ;//當(dāng)前頁號(hào)->r0
mov r1, r9 ;//當(dāng)前目標(biāo)地址->r1
bl ReadNandPage ;//讀取該頁的NAND數(shù)據(jù)到RAM
add r9, r9, #512 ;//每一頁的大小是512Bytes
add r8, r8, #1 ;//r8指向下一頁
4
cmp r8, #5120 ;//比較是否讀完5120頁即128KBytes
bcc %B2 ;//如果r8小于256(沒讀完),就返回前面的標(biāo)號(hào)2處
mov r5, #NFCONF ;DsNandFlash
ldr r0, [r5, #4]
bic r0, r0, #1
str r0, [r5, #4]
]
ldr pc, =copy_proc_beg ;//ldr指令 加載了絕對(duì)地址,現(xiàn)在pc指向的是sdram中的copy_proc_beg,程序在sdram上運(yùn)行了
;===========================================================
copy_proc_beg
adr r0, ResetEntry ;//程序在sdram上運(yùn)行了,該取值方式 取到的地址就是相對(duì)于pc的偏移地址了也就是0x30000000
;//這里應(yīng)該注意,使用的是adr,而不是ldr。使用ldr說明ResetEntry是個(gè)絕對(duì)地址,這個(gè)地址是在程序鏈接的時(shí)候
;//確定的。而使用adr則說明ResetEntry的地址和當(dāng)前代碼的執(zhí)行位置有關(guān),它是一個(gè)相對(duì)的地址。比如這段代碼
;//在stepingstone里面執(zhí)行,那么ResetEntry的地址就是零。如果在sdRAM里執(zhí)行,那么ResetEntry就應(yīng)是sdRAM的一個(gè)
;//地址,應(yīng)該等于RO base 為0x30000000。
ldr r2, BaseOfROM ;//0x30000000 ldr 是把BaseOfROM(一地址)中的值放到r2中
cmp r0, r2
ldreq r0, TopOfROM ;//相等就跳轉(zhuǎn) 相等說明程序是從nandflash或者sdram中運(yùn)行的。不相等是從norflash運(yùn)行的
beq InitRam
ldr r3, TopOfROM ;//以下代碼是針對(duì)代碼在NOR FLASH時(shí)的拷貝方法,這個(gè)程序 從norflash也要copy程序
0
ldmia r0!, {r4-r7} ;//搬運(yùn)代碼
stmia r2!, {r4-r7}
cmp r2, r3
bcc %B0
sub r2, r2, r3 ;//上面拷貝時(shí)每次拷貝4個(gè)雙字(32位)大小,但是RO段大小不一定是4的整數(shù)倍,所以可能多拷貝了幾個(gè)雙字大小,r2-r3得到多拷貝的個(gè)數(shù)
sub r0, r0, r2 ;//r0-(r2-r3)可以使r0指向在boot nand中RO的結(jié)束地址
InitRam //復(fù)制SW區(qū)域
ldr r2, BaseOfBSS
ldr r3, BaseOfZero
0
cmp r2, r3;//比較BaseOfBSS和BaseOfZero
ldrcc r1, [r0], #4
strcc r1, [r2], #4
bcc %B0
mov r0, #0
ldr r3, EndOfBSS
1
cmp r2, r3
strcc r0, [r2], #4
bcc %B1
ldr pc, =%F2 ;goto compiler address
2
; [ CLKDIV_VAL>1 ; means Fclk:Hclk is not 1:1.
; bl MMU_SetAsyncBusMode
; |
; bl MMU_SetFastBusMode ; default value.
; ]
; bl Led_Test
;===========================================================
; //進(jìn)入C語言前的最后一步了,就是把我們用說查二級(jí)向量表的中斷例程安裝到一級(jí)向量表(異常向量表)里.
; Setup IRQ handler
ldr r0,=HandleIRQ ;This routine is needed
ldr r1,=IsrIRQ ;if there is not 'subs pc,lr,#4' at 0x18, 0x1c
str r1,[r0] //把IsrIRQ的地址放到HandleIRQ中
; ;Copy and paste RW data/zero initialized data
; ldr r0, =|Image$$RO$$Limit| ; Get pointer to ROM data
; ldr r1, =|Image$$RW$$Base| ; and RAM copy
; ldr r3, =|Image$$ZI$$Base|
;
; ;Zero init base => top of initialised data
; cmp r0, r1 ; Check that they are different
; beq %F2
;1
; cmp r1, r3 ; Copy init data
; ldrcc r2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4
; strcc r2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4
; bcc %B1
;2
; ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segment
; mov r2, #0
;3
; cmp r3, r1 ; Zero init
; strcc r2, [r3], #4
; bcc %B3
[ :LNOT:THUMBCODE
bl Main ;Do not use main() because ......
;ldr pc, =Main ;
b .
]
[ THUMBCODE ;for start-up code for Thumb mode
orr lr,pc,#1
bx lr
CODE16
bl Main ;Do not use main() because ......
b .
CODE32
]
;function initializing stacks
InitStacks ;//-----------------------7個(gè)模式堆棧初始化
;Do not use DRAM,such as stmfd,ldmfd......
;SVCstack is initialized before
;Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'
mrs r0,cpsr ;//cpsr為狀態(tài)寄存器
bic r0,r0,#MODEMASK ;//清空低5位的數(shù)據(jù)
orr r1,r0,#UNDEFMODE|NOINT
msr cpsr_cxsf,r1 ;UndefMode
ldr sp,=UndefStack ; UndefStack=0x33FF_5C00
orr r1,r0,#ABORTMODE|NOINT
msr cpsr_cxsf,r1 ;AbortMode
ldr sp,=AbortStack ; AbortStack=0x33FF_6000
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQMode
ldr sp,=IRQStack ; IRQStack=0x33FF_7000
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQMode
ldr sp,=FIQStack ; FIQStack=0x33FF_8000
bic r0,r0,#MODEMASK|NOINT
orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVCMode
ldr sp,=SVCStack ; SVCStack=0x33FF_5800
;USER mode has not be initialized.
mov pc,lr
;The LR register will not be valid if the current mode is not SVC mode.
;===========================================================
[ {TRUE}
|
ReadNandID
mov r7,#NFCONF
ldr r0,[r7,#4] ;NFChipEn();
bic r0,r0,#2
str r0,[r7,#4]
mov r0,#0x90 ;WrNFCmd(RdIDCMD);
strb r0,[r7,#8]
mov r4,#0 ;WrNFAddr(0);
strb r4,[r7,#0xc]
1 ;while(NFIsBusy());
ldr r0,[r7,#0x20]
tst r0,#1
beq %B1
ldrb r0,[r7,#0x10] ;id = RdNFDat()<<8;
mov r0,r0,lsl #8
ldrb r1,[r7,#0x10] ;id |= RdNFDat();
orr r5,r1,r0
ldr r0,[r7,#4] ;NFChipDs();
orr r0,r0,#2
str r0,[r7,#4]
mov pc,lr
ReadNandStatus
mov r7,#NFCONF
ldr r0,[r7,#4] ;NFChipEn();
bic r0,r0,#2
str r0,[r7,#4]
mov r0,#0x70 ;WrNFCmd(QUERYCMD);
strb r0,[r7,#8]
ldrb r1,[r7,#0x10] ;r1 = RdNFDat();
ldr r0,[r7,#4] ;NFChipDs();
orr r0,r0,#2
str r0,[r7,#4]
mov pc,lr
WaitNandBusy
mov r0,#0x70 ;WrNFCmd(QUERYCMD);
mov r1,#NFCONF
strb r0,[r1,#8]
1 ;while(!(RdNFDat()&0x40));
ldrb r0,[r1,#0x10]
tst r0,#0x40
beq %B1
mov r0,#0 ;WrNFCmd(READCMD0);
strb r0,[r1,#8]
mov pc,lr
CheckBadBlk
mov r7, lr
mov r5, #NFCONF
bic r0,r0,#0x1f ;addr &= ~0x1f;
ldr r1,[r5,#4] ;NFChipEn()
bic r1,r1,#2
str r1,[r5,#4]
mov r1,#0x50 ;WrNFCmd(READCMD2)
strb r1,[r5,#8]
mov r1, #5;6 ;6->5
strb r1,[r5,#0xc] ;WrNFAddr(5);(6) 6->5
strb r0,[r5,#0xc] ;WrNFAddr(addr)
mov r1,r0,lsr #8 ;WrNFAddr(addr>>8)
strb r1,[r5,#0xc]
cmp r6,#0 ;if(NandAddr)
movne r0,r0,lsr #16 ;WrNFAddr(addr>>16)
strneb r0,[r5,#0xc]
; bl WaitNandBusy ;WaitNFBusy()
;do not use WaitNandBusy, after WaitNandBusy will read part A!
mov r0, #100
1
subs r0, r0, #1
bne %B1
2
ldr r0, [r5, #0x20]
tst r0, #1
beq %B2
ldrb r0, [r5,#0x10] ;RdNFDat()
sub r0, r0, #0xff
mov r1,#0 ;WrNFCmd(READCMD0)
strb r1,[r5,#8]
ldr r1,[r5,#4] ;NFChipDs()
orr r1,r1,#2
str r1,[r5,#4]
mov pc, r7
ReadNandPage
mov r7,lr
mov r4,r1
mov r5,#NFCONF
ldr r1,[r5,#4] ;NFChipEn()
bic r1,r1,#2
str r1,[r5,#4]
mov r1,#0 ;WrNFCmd(READCMD0)
strb r1,[r5,#8]
strb r1,[r5,#0xc] ;WrNFAddr(0)
strb r0,[r5,#0xc] ;WrNFAddr(addr)
mov r1,r0,lsr #8 ;WrNFAddr(addr>>8)
strb r1,[r5,#0xc]
cmp r6,#0 ;if(NandAddr)
movne r0,r0,lsr #16 ;WrNFAddr(addr>>16)
strneb r0,[r5,#0xc]
ldr r0,[r5,#4] ;InitEcc()
orr r0,r0,#0x10
str r0,[r5,#4]
bl WaitNandBusy ;WaitNFBusy()
mov r0,#0 ;for(i=0; i<512; i++)
1
ldrb r1,[r5,#0x10] ;buf[i] = RdNFDat()
strb r1,[r4,r0]
add r0,r0,#1
bic r0,r0,#0x10000
cmp r0,#0x200
bcc %B1
ldr r0,[r5,#4] ;NFChipDs()
orr r0,r0,#2
str r0,[r5,#4]
mov pc,r7
]
;===========================================================
LTORG
;GCS0->SST39VF1601
;GCS1->16c550
;GCS2->IDE
;GCS3->CS8900
;GCS4->DM9000
;GCS5->CF Card
;GCS6->SDRAM
;GCS7->unused
SMRDATA DATA ;//這是一塊連續(xù)的地址,用于存放 存儲(chǔ)器總線寬度&等待控制寄存器BWSCON,Bank控制寄存器BANKCON0-5
; Memory configuration should be optimized for best performance
; The following parameter is not optimized.
; Memory access cycle parameter strategy
; 1) The memory settings is safe parameters even at HCLK=75Mhz.
; 2) SDRAM refresh period is for HCLK<=75Mhz.
DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Tsrc<<18)+(Tchr<<16)+REFCNT)
DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M
DCD 0x30 ;MRSR6 CL=3clk
DCD 0x30 ;MRSR7 CL=3clk
BaseOfROM DCD |Image$$RO$$Base|
TopOfROM DCD |Image$$RO$$Limit|
BaseOfBSS DCD |Image$$RW$$Base|
BaseOfZero DCD |Image$$ZI$$Base|
EndOfBSS DCD |Image$$ZI$$Limit|
ALIGN
;Function for entering power down mode
; 1. SDRAM should be in self-refresh mode.
; 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
; 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
; 4. The I-cache may have to be turned on.
; 5. The location of the following code may have not to be changed.
;void EnterPWDN(int CLKCON);
EnterPWDN ;//掉電工作模式
mov r2,r0 ;//r2=rCLKCON r0為該函數(shù)輸入?yún)?shù)clkcon
tst r0,#0x8 ;SLEEP mode?
bne ENTER_SLEEP
ENTER_STOP ;//待機(jī)模式
ldr r0,=REFRESH
ldr r3,[r0] ;r3=rREFRESH
mov r1, r3
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0] ;Enable SDRAM self-refresh
mov r1,#16 ;wait until self-refresh is issued. may not be needed.
0 subs r1,r1,#1
bne %B0
ldr r0,=CLKCON ;enter STOP mode.
str r2,[r0]
mov r1,#32
0 subs r1,r1,#1 ;1) wait until the STOP mode is in effect.
bne %B0 ;2) Or wait here until the CPU&Peripherals will be turned-off
; Entering SLEEP mode, only the reset by wake-up is available.
ldr r0,=REFRESH ;exit from SDRAM self refresh mode.
str r3,[r0]
MOV_PC_LR
ENTER_SLEEP ;//SLEEP模式
;NOTE.
;1) rGSTATUS3 should have the return address after wake-up from SLEEP mode.
ldr r0,=REFRESH
ldr r1,[r0] ;r1=rREFRESH
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0] ;Enable SDRAM self-refresh
mov r1,#16 ;Wait until self-refresh is issued,which may not be needed.
0 subs r1,r1,#1
bne %B0
ldr r1,=MISCCR
ldr r0,[r1]
orr r0,r0,#(7<<17) ;Set SCLK0=0, SCLK1=0, SCKE=0.
str r0,[r1]
ldr r0,=CLKCON ; Enter sleep mode
str r2,[r0]
b . ;CPU will die here.
WAKEUP_SLEEP ;//從SLEEP模式下被喚醒函數(shù)
;Release SCLKn after wake-up from the SLEEP mode.
ldr r1,=MISCCR
ldr r0,[r1]
bic r0,r0,#(7<<17) ;SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:0->=SCKE.
str r0,[r1]
;Set memory control registers
ldr r0,=SMRDATA ;be careful! //得到SMRDATA的首地址
ldr r1,=BWSCON ;BWSCON Address //得到BWSCON的地址
add r2, r0, #52 ;End address of SMRDATA
0
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne %B0
mov r1,#256
0 subs r1,r1,#1 ;1) wait until the SelfRefresh is released.
bne %B0
ldr r1,=GSTATUS3 ;GSTATUS3 has the start address just after SLEEP wake-up
ldr r0,[r1]
mov pc,r0
;=====================================================================
; Clock division test
; Assemble code, because VSYNC time is very short
;=====================================================================
EXPORT CLKDIV124
EXPORT CLKDIV144
CLKDIV124
ldr r0, = CLKDIVN
ldr r1, = 0x3 ; 0x3 = 1:2:4
str r1, [r0]
; wait until clock is stable
nop
nop
nop
nop
nop
ldr r0, = REFRESH ;//SDRAM刷新控制寄存器
ldr r1, [r0]
bic r1, r1, #0xff
bic r1, r1, #(0x7<<8) ;//設(shè)置刷新計(jì)數(shù)的值
orr r1, r1, #0x470 ;// REFCNT135
str r1, [r0]
nop
nop
nop
nop
nop
mov pc, lr
CLKDIV144
ldr r0, = CLKDIVN
ldr r1, = 0x4 ; 0x4 = 1:4:4
str r1, [r0]
; wait until clock is stable
nop
nop
nop
nop
nop
ldr r0, = REFRESH
ldr r1, [r0]
bic r1, r1, #0xff
bic r1, r1, #(0x7<<8)
orr r1, r1, #0x630 ; REFCNT675 - 1520
str r1, [r0]
nop
nop
nop
nop
nop
mov pc, lr
ALIGN
AREA RamData, DATA, READWRITE ;//相應(yīng)中斷跳轉(zhuǎn)的地址存放處
^ _ISR_STARTADDRESS ; _ISR_STARTADDRESS=0x33FF_FF00
HandleReset # 4
HandleUndef # 4
HandleSWI # 4
HandlePabort # 4
HandleDabort # 4
HandleReserved # 4
HandleIRQ # 4
HandleFIQ # 4
;Do not use the label 'IntVectorTable',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
;@0x33FF_FF20
HandleEINT0 # 4
HandleEINT1 # 4
HandleEINT2 # 4
HandleEINT3 # 4
HandleEINT4_7 # 4
HandleEINT8_23 # 4
HandleCAM # 4 ; Added for 2440.
HandleBATFLT # 4
HandleTICK # 4
HandleWDT # 4
HandleTIMER0 # 4
HandleTIMER1 # 4
HandleTIMER2 # 4
HandleTIMER3 # 4
HandleTIMER4 # 4
HandleUART2 # 4
;@0x33FF_FF60
HandleLCD # 4
HandleDMA0 # 4
HandleDMA1 # 4
HandleDMA2 # 4
HandleDMA3 # 4
HandleMMC # 4
HandleSPI0 # 4
HandleUART1 # 4
HandleNFCON # 4 ; Added for 2440.
HandleUSBD # 4
HandleUSBH # 4
HandleIIC # 4
HandleUART0 # 4
HandleSPI1 # 4
HandleRTC # 4
HandleADC # 4
;@0x33FF_FFA0
END